The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a back-end-of-the-line (BEOL) interconnect structure that contains an air gap located on each side of an interconnect metal or metal alloy structure, wherein each air gap has a uniform shape. The present application also provides a method of forming such a semiconductor structure.
Generally, semiconductor devices include a plurality of circuits that form an integrated circuit (IC) fabricated on a semiconductor substrate. A complex network of signal paths will normally be routed to connect the circuit elements distributed on the surface of the substrate. Efficient routing of these signals across the device requires formation of multilevel or multilayered schemes, such as, for example, single or dual damascene wiring structures. The wiring structure, which may also be referred to as a BEOL interconnect structure or an interconnect metal or metal alloy structure, typically includes copper, Cu, since Cu based interconnects provide higher speed signal transmission between large numbers of transistors on a complex semiconductor chip as compared with aluminum, Al, based interconnects.
Within a typical interconnect structure, metal vias containing an interconnect metal or metal alloy run perpendicular to the semiconductor substrate and metal lines also containing an interconnect metal or metal alloy run parallel to the semiconductor substrate. Further enhancement of the signal speed and reduction of signals in adjacent metal lines (known as “crosstalk”) are achieved in today's IC product chips by embedding an interconnect metal or metal alloy structure in a dielectric material having a dielectric constant of less than 4.0 (i.e., a low k dielectric material).
Interconnect structures in integrated circuits induce a delay in the propagation of the information between semiconductor devices such as transistors. To reduce this delay, the interconnect structures should possess the lowest capacitance possible. One approach to form interconnect structures with the lowest possible capacitance is to introduce air (or vacuum) gaps into the interconnect dielectric material of the interconnect structure. By replacing a portion of the dielectric material with an air gap, the capacitance can be reduced dramatically. Typically, air gaps are formed into an interconnect dielectric material by lithography and etching. In such a process, the air gap features are created using a mask and such features are formed from the top of the interconnect dielectric material downward which causes the resultant air gap to have a non-homogeneous (i.e., oval) shape. In such interconnect structures, electrical performance variation may result from the non-homogeneous shape of the air gaps.
There is thus a need for providing a back-end-of-the-line (BEOL) interconnect structure that contains an air gap located on each side of an interconnect metal or metal alloy structure, wherein each air gap has a uniform (i.e., homogenous) shape.